Wireless communication forms nowadays a key technology. The trend here is obviously the growing digitalization of the circuits. At the same time the processing power expectations for mobile applications are increasing. The permanent race in the industry for the smallest process technology paves the way for these goals. On the other side there are numerous applications with a special attention on low power consumption and an economical implementation rather than a high clock frequency. In particular medical and sensor applications need power and area efficient radio systems. Here the production volumes are lower in comparison to portable radio or mobile communication applications. Thus for commercial reasons older CMOS technologies with moderate structural sizes are used. The low initial costs for these technologies makes low volumes economically feasible. An optimal receiver structure depends upon requirements of the communication standards. The high frequency input signal is mixed after a first amplification either directly into the baseband (homodyne) or it is processed on one or more intermediate frequencies (heterodyne). The complexity of the architecture and the circuit together with the costs, the power consumption and the ease of integration are the main decision criteria with the choice of the receiver structure. With further developments in circuit design technologies other receiver architectures became interesting, as well. In particular the homodyne receiver and the receiver with low intermediate frequency (Low-IF receiver) experienced a far spreading in modern radio systems. The Low-IF receiver can be regarded as a middle course between the heterodyne and the homodyne architectures. Actually this receiver is heterodyne. It possesses however also characteristics of a homodyne architecture, which depend in particular on the choice of the intermediate frequency. The goal of this work is the systematic investigation of the characteristics of the Low-IF receiver regarding the maximally necessary intermediate frequency and thus the transition area between the heterodyne and the homodyne variant of the receiver. The special attention is directed thereby toward the requirements of wireless communication systems with the digital frequency modulation FSK. Apart from the theoretical processing of the substantial characteristics of a receiver and different architectures, different variants of signal processing are compared on the basis of a simulation model. The effects of a complex and a real signal processing on the choice of the intermediate frequency are examined. Besides a new demodulation concept, which is based on the so-called quadricorrelator demodulator, is presented. This new demodulator presents a suitable solution especially for power and area efficient applications.