Accurately estimating the failure region of rare events for memory-cell and analog circuit blocks under process variations is a challenging task. As the first part of the thesis, author propose a new statistical method, called EliteScope to estimate the circuit failure rates in rare event regions and to provide conditions of parameters to achieve targeted per- formance. The new method is based on the iterative blockade framework to reduce the number of samples. But it consists of two new techniques to improve existing methods. First, the new approach employs an elite learning sample selection scheme, which can con- sider the effectiveness of samples and well-coverage for the parameter space. As a result, it can reduce additional simulation costs by pruning less effective samples while keeping the accuracy of failure estimation. Second, the EliteScope identifies the failure regions in terms of parameter spaces to provide a good design guidance to accomplish the performance target. It applies variance based feature selection to find the dominant parameters and then determine the in-spec boundaries of those parameters. We demonstrate the advantage of our proposed method using several memory and analog circuits with different number of process parameters. Experiments on four circuit examples show that EliteScope achieves a significant improvement on failure region estimation in terms of accuracy and simulation cost over traditional approaches. The 16-bit 6T-SRAM column example also demonstrate that the new method is scalable for handling large problems with large number of process variables.