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Plans for PANDA Online Computing

Authors
  • Lange, Jens Soeren
  • Jin, Dapeng
  • Kirschner, Daniel
  • Kopp, Andreas
  • Kuehn, Wolfgang
  • Lang, Johannes
  • Li, Lu
  • Liu, Ming
  • Liu, ZhenAn
  • Muenchow, David
  • Perez, Tiago
  • Roskoss, Johannes
  • Wang, Qiang
  • Xu, Hao
  • Yang, Shuo
Type
Published Article
Publication Date
Oct 16, 2009
Submission Date
Oct 09, 2009
Identifiers
DOI: 10.1088/1748-0221/4/11/P11001
Source
arXiv
License
Yellow
External links

Abstract

The PANDA experiment will not use any hardware trigger, i.e. all raw data are streaming in the data acquisition with a bandwidth of ~280 GB/s. The PANDA Online System is designed to perform data reduction by a factor of ~800 by reconstruction algorithms programmed in VHDL (Very High Speed Integrated Circuit Hardware Description Language) on FPGAs (Field Programmable Gate Arrays).

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