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Miniaturizing DC-DC Converters for Mobile Applications via Hybrid and Inductor-First Topologies

Authors
  • Abdulslam, Abdullah Amgad Abdulaziz
Publication Date
Jan 01, 2021
Source
eScholarship - University of California
Keywords
Language
English
License
Unknown
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Abstract

As the size of the electronics in mobile and IoT devices scales down while performance demands scale up, power management integrated circuits (PMICs) face increasing pressure to provide highly efficient conversion in increasingly small areas. Most modern mobile devices are powered from Li-ion batteries that operate between 3-5 V. However, the system-on-chips (SoCs) that are powered in such systems are typically operating at < 1.2 V, requiring DC-DC converters that can provide high continuous conversion ratios up to 15x. Ideally, this DC-DC converter should both be efficient in order to maximize battery lifetime, and also small in order to minimize device volume. Unfortunately, for a given topology and packaging technology, there is typically a direct trade-off between efficiency and power density making the achievement of an acceptable trade-off point for a DC-DC converter more challenging.This thesis introduces new topologies and techniques that help ease this trade-off between efficiency and power density while providing additional benefits like enhanced light load efficiency and reduced input noise and EMI. The first part of the thesis introduces a passive-stacked 3rd order buck (PS3B) converter that offers loss-, structure-, and noise-related benefits as compared to a conventional buck converter. Specifically, all the passives including two inductors are stacked in a packaging-friendly manner at the converter input, allowing for the inductors to process lower current than a conventional buck converter while inherently filtering input current noise. In the second part, a charge recycling technique is applied to the PS3B converter which enables direct reciprocal recycling of gate charge from one power MOSFET to the other, all without affecting converter operation or control. To directly power an SoC from a Li-ion battery while using low-voltage transistors, the third part introduces a symmetric modified multilevel ladder converter that, as compared to conventional flying-capacitor multilevel converters, features reduced conduction losses, naturally balanced flying capacitors, and internal generation of all the supplies required for drivers and level shifters. To combine the benefits of the PS3B converter (inductors processing continuous current on the low-current side of the converter) with the benefits of multilevel converters (Li-ion battery compatibility with low-voltage transistors, and reduced inductor size), an inductor-first flying-capacitor multi-level (FCML) converter is introduced. Prototypes of the presented topologies and techniques achieve state-of-the-art numbers in terms of efficiency, power density, light load efficiency and noise performance.

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