The lateral profile of trapped charge in a silicon-oxide-nitride-oxide-silicon (SONOS) electrically erasable programmable read-only memory programmed using channel-hot-electron injection is determined using current-voltage (ID-VG) measurements along with two-dimensional device simulations and is verified using gate-induced-drain-leakage measurements, charge-pumping (CP) measurements, and Monte Carlo simulations. An iterative procedure is used to match simulated ID-VG characteristics with experimental ID-VG characteristics at different stages of programming, by sequentially increasing the trapped electron charge in simulations. Fresh cells are found to contain a high laterally nonuniform trapped charge, which (along with large electron injection during the program) make the conventional CP techniques inadequate for extracting the charge profile. This charge results in a nonmonotonous variation of threshold and flat-band voltages along the channel and makes it impossible to simultaneously determine interface and trapped charge profiles using CP alone. The CP technique is modified for application to SONOS cells and is used to verify the charge profile obtained using ID-VG and to estimate the interface degradation. This paper enhances the study presented in our earlier work.