Epitaxial growth of heterostructure nanowires allows for the definition of narrow sections with specific semiconductor composition. The authors demonstrate how postgrowth engineering of III-V heterostructure nanowires using selective etching can form gaps, sharpening of tips, and thin sections simultaneously on multiple nanowires. They investigate the potential of combining nanostencil deposition of catalyst, epitaxial III-V heterostructure nanowire growth, and selective etching, as a road toward wafer scale integration and engineering of nanowires with existing silicon technology. Nanostencil lithography is used for deposition of catalyst particles on trench sidewalls and the lateral growth of III-V nanowires is achieved from such catalysts. The selectivity of a bromine-based etch on gallium arsenide segments in gallium phosphide nanowires is examined, using a hydrochloride etch to remove the III-V native oxides. Depending on the etching conditions, a variety of gap topologies and tiplike structures are observed, offering postgrowth engineering of material composition and morphology.