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A Reconfigurable Power-conscious Core Wrapper and its Application to SOC Test Scheduling

Authors
Publisher
IEEE
Publication Date
Keywords
  • Tam
  • Test Access Mechanisms
  • Test Scheduling
  • Wrapper Configuration
  • Tam Routing
  • Wrapper Logic
  • Test Power Consumption
  • Preemptive Scheduling
  • Technology And Engineering

Abstract

This paper presents a novel reconfigurable powerconscious core test wrapper and discusses its application to optimal power-constrained SOC (system-on-chip) test scheduling. The advantage with the proposed wrapper is that at each core it allows (1) a exible TAM (test access mechanism) bandwidths, and (2) a possibility to select the appropriate test power consumption. Our scheduling technique, an extension of a preemptive scheduling approach,produces optimal solutions in respect to test time, and selects wrapper configurations in a systematic way that implicitly minimizes the TAM routing and the wrapper logic. Experimental results show the efficiency of our approach.

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