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Fault Detection of Linear Analog Integrated Circuit in Network

Authors
  • Li, Deliang1
  • Huang, Kaoli1
  • Wang, Changlong1
  • 1 Mechanical Engineering College, Shijiazhuang, 050003, China , Shijiazhuang (China)
Type
Published Article
Journal
Journal of Electronic Testing
Publisher
Springer US
Publication Date
Jul 29, 2014
Volume
30
Issue
4
Pages
483–489
Identifiers
DOI: 10.1007/s10836-014-5468-2
Source
Springer Nature
Keywords
License
Yellow

Abstract

This paper presents a novel network decomposition method that can detect faults of linear analog integrated circuit (IC) in network. The nodal admittance matrix (NAM) of linear analog IC is a function of its internal component values, which can be used for fault detection. However, it is difficult to obtain the NAM of linear analog IC in network. We propose a network decomposition based method to calculate the NAM of the IC under test in network. The IC under test is fault free, if its NAM lies inside the tolerance limit. Otherwise, it is faulty. The effectiveness of the proposed method is validated through benchmark circuits.

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