Abstract A Charged Device Model (CDM) specific ESD failure mechanism is discussed for an input protection structure in a smart power technology. The input structure shows unexpected dependency of the CDM robustness on design variations of the input resistor. This paper demonstrates that circuit simulation reproduced the complex failure mechanism accurately after elements like package parameters, substrate resistance, parasitic pn-junctions and the resistance of parasitic physical layers were considered. The importance of accurately modeling these factors for achieving meaningful conclusions for CDM failure mechanisms and CDM robustness from circuit simulation is presented. For validation of the proposed simulation setup, results from circuit simulation are compared to measurements and device simulation.