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Suppression of Short Channel Effects(SCEs) by Dual Material Gate Vertical Surrounding Gate(DMGVSG) MOSFET: 3-D TCAD Simulation

Authors
Journal
Procedia Engineering
1877-7058
Publisher
Elsevier
Volume
64
Identifiers
DOI: 10.1016/j.proeng.2013.09.083
Keywords
  • Drain Induced Barrier Lowering (Dibl)
  • Dual Meterial Gate Vertical Surrounding Gate (Dmgvsg)
  • Short Channel Effects (Sce)
  • Single Material Gate(Smg)
  • Subthreshold-Swing (Ss)

Abstract

Abstract In this Paper, Dual Material Gate Vertical Surrounding Gate (DMGVSG) MOSFET is proposed and demonstrated using numerical simulation. In this device the features of dual material gate are adopted to get improved performance of the device. The device performance is investigated in terms of threshold voltage (Vth) roll-off, subthreshold swing (SS), drain induced barrier lowering (DIBL) and leakage current. The significance of the dual material gate is demonstrated by comparing its performance with the single material gate MOSFET. The simulation results reveal that the proposed device has suppressed short channel effects (SCEs) and improved on-current (ION). Further device exhibits improved ION/IOFF ratio and low leakage current. Hence this device is an ultimate structure for future VLSI and low power applications in the nanoscale regime.

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