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CMOS Ultralow Power Brain Signal Acquisition Front-Ends: Design and Human Testing.

Authors
  • Karimi-Bidhendi, Alireza
  • Malekzadeh-Arasteh, Omid
  • Lee, Mao-Cheng
  • McCrimmon, Colin M
  • Wang, Po T
  • Mahajan, Akshay
  • Liu, Charles Yu
  • Nenadic, Zoran
  • Do, An H
  • Heydari, Payam
Type
Published Article
Journal
IEEE Transactions on Biomedical Circuits and Systems
Publisher
Institute of Electrical and Electronics Engineers
Publication Date
Aug 01, 2017
Identifiers
DOI: 10.1109/TBCAS.2017.2723607
PMID: 28783638
Source
Medline
License
Unknown

Abstract

Two brain signal acquisition (BSA) front-ends incorporating two CMOS ultralow power, low-noise amplifier arrays and serializers operating in mosfet weak inversion region are presented. To boost the amplifier's gain for a given current budget, cross-coupled-pair active load topology is used in the first stages of these two amplifiers. These two BSA front-ends are fabricated in 130 and 180 nm CMOS processes, occupying 5.45 mm 2 and 0.352 mm 2 of die areas, respectively (excluding pad rings). The CMOS 130-nm amplifier array is comprised of 64 elements, where each amplifier element consumes 0.216 μW from 0.4 V supply, has input-referred noise voltage (IRNoise) of 2.19 μV[Formula: see text] corresponding to a power efficiency factor (PEF) of 11.7, and occupies 0.044 mm 2 of die area. The CMOS 180 nm amplifier array employs 4 elements, where each element consumes 0.69 μW from 0.6 V supply with IRNoise of 2.3 μV[Formula: see text] (corresponding to a PEF of 31.3) and 0.051 mm 2 of die area. Noninvasive electroencephalographic and invasive electrocorticographic signals were recorded real time directly on able-bodied human subjects, showing feasibility of using these analog front-ends for future fully implantable BSA and brain- computer interface systems.

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