Abstract A master CMOS test vehicle chip using currently available CMOS technologies from MOSIS Foundry has been designed for use in monitoring electrical performance of CMOS based systems on board in space flights against the total dose effect. The master test chip includes designs of selected CMOS devices and logic circuits to monitor in an integrated manner the behavior of several radiation sensitive parameters namely, I– V characteristics, speed-power product, propagation delay time and fan-out capability, CMOS latchup, hot-carrier-induced charge effects in VLSI switching circuits and critical logic path through the functional logic device by a dynamic shift register. A methodology to evaluate test vehicle chip is proposed incorporating experimental studies, analytical modeling and their correlation with the experimental data. CMOS test chip fabricated from MOSIS Foundry wil be probed for static and dynamic data acquisition under preirradiated and postirradiated conditions and simulated operating environment. Space radiation exposure to the test devices will be simulated using Louisiana State University, Baton Rouge Center for Advanced Microstructures and Devices (CAMD) X-ray synchrotron as a radiation source #1.