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Back gated multilayer InSe transistors with enhanced carrier mobilities via the suppression of carrier scattering from a dielectric interface.

Authors
  • Feng, Wei
  • Zheng, Wei
  • Cao, Wenwu
  • Hu, PingAn
Type
Published Article
Journal
Advanced Materials
Publisher
Wiley (John Wiley & Sons)
Publication Date
Oct 01, 2014
Volume
26
Issue
38
Pages
6587–6593
Identifiers
DOI: 10.1002/adma.201402427
PMID: 25167845
Source
Medline
Keywords
License
Unknown

Abstract

The back gate multilayer InSe FETs exhibit ultrahigh carrier mobilities, surpassing all the reported layer semiconductor based electronics with the same device configuration, which is achieved by the suppression of the carrier scattering from interfacial coulomb impurities or surface polar phonons at the interface of an oxidized dielectric substrate. The room-temperature mobilities of multilayer InSe transistors increase from 64 cm(2)V(-1)s(-1) to 1055 cm(2)V(-1)s(-1) using a bilayer dielectric of poly-(methyl methacrylate) (PMMA)/Al2O3. The transistors also have high current on/off ratios of 1 × 10(8), low standby power dissipation, and robust current saturation in a broad voltage range.

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