In this paper, a low-power CMOS analog automatic action potential (AP) detector is proposed for wireless neural recording implants. The proposed AP detector is based on comparing the neural input signal with an analog threshold level. The threshold level is obtained by calculating the root mean square value of the neural input signal. In order to generate the threshold voltage level, the AP detector incorporates a continuous-time (CT) sigma-delta (Σ∆) modulator in its analog signal processing section. This structure benefits from the combination of a CT Σ∆ modulator and a single-bit DAC as the multiplier to reduce the power consumption. Although in contrast to the traditional methods, the required circuits are not biased in the subthreshold region, the total power consumption is reduced. The proposed AP detector is designed in TSMC 90 nm CMOS technology and consumes 11.8 µW from a single 1-V power supply. It is worth mentioning that the utilized CT Σ∆ modulator can also be used in the analog-to-digital converter to significantly reduce both the power consumption and silicon area of the complete neural recording system.