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Substrate impact on threshold voltage and subthreshold slope of sub-32 nm ultra thin SOI MOSFETs with thin buried oxide and undoped channel

Authors
Journal
Solid-State Electronics
0038-1101
Publisher
Elsevier
Publication Date
Volume
54
Issue
2
Identifiers
DOI: 10.1016/j.sse.2009.12.021
Keywords
  • Soi Mosfet
  • Utb
  • Thin Box
  • Subthreshold Slope
  • Short Channel Effect
  • Substrate Coupling

Abstract

Abstract This paper aims at presenting a detailed and comprehensive study of the influence of space-charge condition at the substrate/BOX interface, as a function of the gate length and substrate bias, on both the front threshold voltage ( V th f ) and subthreshold slope ( S), for sub-32 nm Ultra-Thin Body (UTB) SOI MOSFETs with two different BOX thicknesses: either standard 145 nm (UTB) or thin 11.5 nm (UTB 2). This study details for the first time, the important impact of the substrate/BOX interface regime variations with gate length from 1 μm down to 25 nm, substrate bias and BOX thickness together, on the mean channel position into film and its related impact on the electrical parameters V th f and S. Experimental results and conclusions are also completed and enlightened by ATLAS simulations and analytical modeling.

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