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FPGA-based implementation of recursive algorithms

Authors
Journal
Microprocessors and Microsystems
0141-9331
Publisher
Elsevier
Publication Date
Volume
28
Identifiers
DOI: 10.1016/j.micpro.2004.03.008
Keywords
  • Recursive Algorithms
  • Hierarchical Finite State Machines
  • Sorting
  • Binary Tree
  • Data Compression
Disciplines
  • Computer Science
  • Mathematics

Abstract

Abstract The paper suggests a novel method for implementing recursive algorithms in hardware. The required support for recursion has been provided through a modular and a hierarchical specification of a control unit that can be translated to an implementation of the respective hardware circuit on the basis of a recursive hierarchical finite state machine and through a mechanism that permits the contents of an execution unit to be stored/restored between hierarchical calls/returns. The paper describes all the details that are required to implement recursive algorithms in hardware. It begins with software (C++) models and finishes with synthesizable VHDL codes. Two practical applications of recursive algorithms in the data sorting and compression area have been studied in detail.

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