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Temperature dependence and thermal stability of planar-integrated enhancement/depletion-mode AlGan/GaN HEMTs and digital circuits

Authors
Journal
Solid-State Electronics
0038-1101
Publisher
Elsevier
Publication Date
Volume
53
Issue
1
Identifiers
DOI: 10.1016/j.sse.2008.09.001
Keywords
  • Algan/Gan
  • Enhancement/Depletion-Mode Hemt
  • Fluorine Plasma Treatment
  • Planar Process
  • High-Temperature Digital Integrated Circuits

Abstract

Abstract We report detailed results on the temperature dependence and thermal stability of the planar-integrated enhancement/depletion-mode (E/D-mode) AlGaN/GaN high-electron mobility transistors (HEMTs). Compared to the standard mesa etching technique, the plasma treatment can achieve the same device isolation results. The E/D-mode HEMTs and the corresponding digital integrated circuits fabricated by the planar process exhibit stable operation from room temperature up to 350 °C. No degradation in device performance was observed after a 140-h thermal stress at 350 °C, implying excellent thermal stability of the planar process. The direct-coupled FET logic inverter, realized by planar-integration of E/D-mode HEMTs, presents larger noise margins (NM S) at high temperatures than the previously reported work, demonstrating promising potential for GaN-based high-temperature digital ICs. The NM improvement can be attributed to the higher threshold voltage and the improved gate turn-on voltage of the E-mode HEMTs that is achieved with larger plasma treatment dose.

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