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Wireless Interconnect for Board and Chip Level

Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden
Publication Date
  • Elektronische Systeme
  • Kommunikationsinfrastruktur
  • Sonderforschungsbereich 912
  • Hochadaptive Energieeffiziente Systeme
  • Electronic Systems
  • Communications Infrastructure
  • Collaborative Research Centre 912
  • Highly Adaptive Energy-Efficient Computing
  • Ddc:620
  • Ddc:621.3
  • Rvk:Zn 6420
  • Communication
  • Design


Electronic systems of the future require a very high bandwidth communications infrastructure within the system. This way the massive amount of compute power which will be available can be inter-connected to realize future powerful advanced electronic systems. Today, electronic inter-connects between 3D chip-stacks, as well as intra-connects within 3D chip-stacks are approaching data rates of 100 Gbit/s soon. Hence, the question to be answered is how to efficiently design the communications infrastructure which will be within electronic systems. Within this paper approaches and results for building this infrastructure for future electronics are addressed.

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