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A novel SOI MESFET by reducing the electric field crowding for high voltage applications

Superlattices and Microstructures
DOI: 10.1016/j.spmi.2014.03.035
  • Metal–Semiconductor Field-Effect Transistor (Mesfet)
  • Charge Distribution
  • Silicon On Insulator
  • Field Plate


Abstract In this paper, a novel silicon-on-insulator (SOI) metal–semiconductor field-effect transistor (MESFET) is presented by reducing the electric field crowding. The charge distribution in channel modifies by reducing the electric field crowding and results in the breakdown voltage (VBR) improves. To reduce the electric field crowding, a buried field plate (BFP) is employed in the buried oxide of the SOI MESFET and connected to source. DC and frequency response characteristics of the SOI MESFET with BFP (BFP-SOI MESFET) are analyzed via a 2-D numerical simulation and the results are compared with characteristics of a conventional SOI MESFET (C-SOI MESFET) structure. The BFP has outstanding effect on the VBR of the device. The VBR of the proposed BFP-SOI MESFET improves by 84% compared with that of the C-SOI MESFET. Although the saturation drain current of the proposed structure has decreased to a small extent, 37% increase in maximum power density is obtained. In addition, the proposed structure showed an approximately 70% decrease in the gate-drain capacitance (Cgd), which in-turn resulted in 5dB maximum available gain (MAG) improvement at 2GHz. As a result of employing the buried field plate, the BFP SOI-MESFET has an outstanding DC and frequency response performance compared with the C-SOI MESFET.

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