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Mask patterning challenges for device fabrication below 100 nm

Authors
Journal
Microelectronic Engineering
0167-9317
Publisher
Elsevier
Publication Date
Identifiers
DOI: 10.1016/s0167-9317(98)00004-5

Abstract

Abstract Mask pattern generation, pattern transfer processes, and inspection and repair will be critical factors influencing progress in nanolithography. By identifying the lithography trends driving mask-patterning issues, it is possible to define the future challenges the technology will be facing to enable semiconductor device fabrication at and below the 100 nm device generation. This paper offers a roadmap of potential solutions that would enable advanced mask technology. It also identifies several topics accessible to universities and other organizations focused on precompetitive research, which are complementary to the aims of industrial development of semiconductor technology.

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