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A 1.8 V 128 Mb mobile DRAM with hidden-precharged triple pumping scheme and dual-path hybrid current sense amplifier

Authors
Journal
Current Applied Physics
1567-1739
Publisher
Elsevier
Publication Date
Volume
4
Issue
1
Identifiers
DOI: 10.1016/j.cap.2003.09.008
Keywords
  • Low Voltage
  • Low Power
  • Pumping Circuit
  • Current Sense Amplifier
  • Mobile Dram
  • Dram
  • Memory
Disciplines
  • Design

Abstract

Abstract A 1.8 V low-voltage and low-power 128 Mb mobile SDRAM is designed and fabricated for hand-held, battery-operated electronic devices with a 0.15-μm CMOS technology. As an essential low-voltage circuit, a triple pumping scheme is proposed to generate a stable boosted voltage whose level exceeds over twice the supply voltage and which is required for the boosted word-line bias. In addition, to convert the bit-line data to a low-voltage CMOS level, a new NMOS and PMOS hybrid folded current sense amplifier with dual-path current sensing scheme is proposed to obtain the stable I-to- V gain as well as to improve the low-voltage margin.

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