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Interface states and traps in thin N2O-grown oxynitride/oxide di-layer for PowerMOSFET devices

Authors
Journal
Microelectronics Reliability
0026-2714
Publisher
Elsevier
Publication Date
Volume
47
Identifiers
DOI: 10.1016/j.microrel.2007.01.016

Abstract

Abstract A detailed study of the interface state properties shown by the silicon/oxynitride/oxide gate layers used in Vertically Diffused PowerMOSFET (PowerVDMOS) technologies is reported. A quantitative analysis of interface states versus the specific N 2O based nitridation process, extracted from current–voltage characteristics in depletion regime, provided a clear trend and turns to be of great importance for reliability performances of the final device.

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