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Fast co-simulation based on synchronization time-point prediction

서울대학교 대학원
Publication Date
  • 다중 프로세서 시스템 온 칩
  • Multiprocessor System-On-Chip
  • 사이클 단위 통합 시뮬레이션
  • Cycle-Accurate Co-Simulation
  • 명령어 세트 시뮬레이터
  • Instruction Set Simulator
  • 근사적 사이클 단위 통합 시뮬레이션
  • Cycle-Approximate Co-Simulation
  • 트랜잭션 단위 모델
  • Transaction Level Model
  • Os 모델
  • Os Model
  • 동기화 부담
  • Synchronization Overhead
  • Computer Science
  • Design


Multi-processor SoC (MPSoC) design is much more difficult and may need much longer design cycle than conventional SoC design with one or two processors. This is mainly due to new design challenges such as parallel programming, mapping, debugging of concurrent processes running on different processors, etc. With this in mind, re-design of an MPSoC at a late design stage can be very costly, and more thorough validation in early design stages is crucial to reduce design cycle as well as design risk. Since system validation methods in early stage of design flow should have high availability and visibility, co-simulation in various level of system abstraction is widely used to validate the system. Especially, timed co-simulation is indispensable to validate complex MPSoC because the behavior of complex MPSoC is highly dependent on the timing of interactions among the system components. However the low performance of current timed co-simulation environments causes designers to have difficuties in whole system-level simulation with full target software including OS. The performance bottleneck in timed co-simulation comes mainly from the fact that the simulation models should be synchronized at every timing granularity to validate timing behavior of the system. For example, the simulation models have to be synchronized at every clock cycle in cycle-accurate co-simulation, and at every delay boundary in delay-annotated cycle-approximate co-simulation. In the case of multiple-process co-simulation environment, the synchronization overhead becomes significant because the simulators exchange messges via Inter-Process Communication (IPC) for the synchronization. In the case of single-process co-simulation environment, the simulation kernel performs context switches between simulation models to synchronize them. Although the IPC overhead is removed during the synchronization in the single- process environment, still, the context switching overhea

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