Silicon photonic devices are very sensitive to process variation, and it is important for circuit designers that they can predict the effect of this variability during the design phase, and optimize their design for both performance and yield. This requires an accurate predictive model of the spatial variations induced by the fabrication process. W...
Gate-all-around (GAA) nanosheet field effect transistors (NSFETs) seem to be one of the most promising replacement options for FinFETs towards scaling down below to the sub-7nm technology nodes. They offer better electrostatics and control of short channel effects (SCEs) due to their superior control over the channel and their large effective chann...
We propose a method to analyze the performance variability caused by fabrication uncertainty in photonic circuits with a large number of correlated parameters. By combining a sparse polynomial chaos expansion model with dimensionality reduction in the form of Karhunen-Loève transform and principal component analysis, we demonstrate the stochastic a...
status: published
Published in Sensors (Basel, Switzerland)
This paper analyzes and compensates for process and temperature dependency among a (Complementary Metal Oxide Semiconductor) CMOS image sensor (CIS) array. Both the analysis and compensation are supported with experimental results on the CIS’s dark current, dark signal non-uniformity (DSNU), and conversion gain (CG). To model and to compensate for ...
Published in Micromachines
Current advanced transistor architectures, such as FinFETs and (stacked) nanowires and nanosheets, employ truly three-dimensional architectures. Already for aggressively scaled bulk transistors, both statistical and systematic process variations have critically influenced device and circuit performance. Three-dimensional device architectures make t...
To overcome the increasing sensitivity to variability in nanoscale integrated circuits, operation parameters (e.g., supply voltage) are adapted in a customized way exclusively to each chip. AVS is a standard industrial technique which has been adopted widely to compensate for process, voltage, and temperature variations as well as power optimizatio...
In this work a method is described to investigate process variations across a wafer. Through wafer MEMS spiral resonators were designed, simulated, fabricated and characterized by measuring the eigenfrequency and corresponding mode shapes. Measuring the eigenfrequency and resulting spectral behavior of resonators on different locations on the wafer...
This paper presents a design and methodology for accurate characterization of setup and hold margins in silicon while taking into account effects of Process Variations (PV). The test circuit provides deeper insights into sources of extra timing margins available on silicon. This in turn, enables accurate guard banding by preventing optimism and red...
Published in Frontiers in Neuroscience
Reservoir computing (RC) is gaining traction in several signal processing domains, owing to its non-linear stateful computation, spatiotemporal encoding, and reduced training complexity over recurrent neural networks (RNNs). Previous studies have shown the effectiveness of software-based RCs for a wide spectrum of applications. A parallel body of w...
