Dentgen, Manuel Renner, Sebastian Mottok, Jürgen
Published in
Architecture of Computing Systems – ARCS 2020
With the rising complexity and processing power of modern computer systems, the amount of MCU on a single PCB also rises. These microcontrollers often need to communicate with each other to exchange payload and control information in a bidirectional manner. Today’s well-established communication protocols in MCUs either do not fit modern transmissi...
Piatka, Christian Amslinger, Rico Haas, Florian Weis, Sebastian Altmeyer, Sebastian Ungerer, Theo
Published in
Architecture of Computing Systems – ARCS 2020
We present a Transaction Management Unit (TMU) for Hardware Transactional Memories (HTMs). Our TMU enables three different contention management strategies, which can be applied according to the workload. Additionally, the TMU enables unbounded transactions in terms of size. Our approach tackles two challenges of traditional HTMs: (1) potentially h...
Wang, Bo Imtiaz, Aneek Falk, Joachim Glaß, Michael Teich, Jürgen
Published in
Architecture of Computing Systems – ARCS 2020
This paper proposes a novel approach to explore the design space of Power Domain (PD) partitioning in the architecture definition phase of heterogeneous SoCs. By formulating an Integer Linear Program (ILP), task mapping and scheduling is determined concurrently while considering power-off dependencies among cores in the same PD and the power-gating...
Müller, Michael Leich, Thomas Pionteck, Thilo Saake, Gunter Teubner, Jens Spinczyk, Olaf
Published in
Architecture of Computing Systems – ARCS 2020
Due to the growing demand on processing power and energy efficiency by today’s data-intensive applications developers have to deal with heterogeneous hardware platforms composed of specialized computing resources. These are highly efficient for certain workloads but difficult to handle from the software engineering perspective. Even state-of-the-ar...
Hutter, Eric Brinkschulte, Uwe
Published in
Architecture of Computing Systems – ARCS 2020
This paper presents a priority-based task distribution strategy as an extension to the Artificial Hormone System (AHS). The AHS is a distributed middleware based on self-organization principles. It allows to distribute tasks to processing nodes in a self-organizing way while neither having a single-point-of-failure nor requiring external user input...
Dörflinger, Alexander Guan, Yejun Michalik, Sören Michalik, Sönke Naghmouchi, Jamin Michalik, Harald
Published in
Architecture of Computing Systems – ARCS 2020
Numerous processor cores based on the popular RISC-V Instruction Set Architecture have been developed in the past few years and are freely available. The same applies for RISC-V ecosystems that allow to implement System-on-Chips with RISC-V processors on ASICs or FPGAs. However, so far only very little concepts and implementations for fault toleran...
Šišejković, Dominik Merchant, Farhad Reimann, Lennart M. Leupers, Rainer Kegreiß, Sascha
Published in
Architecture of Computing Systems – ARCS 2020
The involvement of third parties in the integrated circuit design and fabrication flow has introduced severe security concerns, including intellectual property piracy, reverse engineering and the insertion of malicious circuits known as hardware Trojans. Logic locking has emerged as a prominent technique to counter these security threats by protect...
Reindl, Andrea Meier, Hans Niemetz, Michael
Published in
Architecture of Computing Systems – ARCS 2020
Due to the transition to renewable energy sources and the increasing share of electric vehicles and smart grids, batteries are gaining in importance. Battery management systems (BMSs) are required for optimal, reliable operation. In this paper, existing BMS topologies are presented and evaluated in terms of reliability, scalability and flexibility....
Rheindt, Sven Fried, Andreas Lenke, Oliver Nolte, Lars Sabirov, Temur Twardzik, Tim Wild, Thomas Herkersdorf, Andreas
Published in
Architecture of Computing Systems – ARCS 2020
Near-memory acceleration strives to tackle the data-to-task locality issue in MPSoCs in order to obtain higher performance and lower power consumption. However, it is not easy to determine whether the advantages arise from the near-memory integration or the hardware acceleration (versus software execution). We propose X-CEL , a method to accurately...
Becker, Thomas Schüle, Tobias
Published in
Architecture of Computing Systems – ARCS 2020
The high degree of parallelism of today’s computing systems often requires executing applications and their tasks in parallel due to a limited scaling capability of individual applications. In such scenarios, considering the differing importance of applications while scheduling tasks is done by assigning priorities to the tasks. However, priorities...
